D3T 2010 - Call for Papers

Submission Deadline Extended to September 3rd, 2010!

CALL FOR PAPERS

Scope -- Submissions -- Key Dates -- Committees

Scope

As technology scales, various new types of defects are presenting unique challenges to the test community. New test defect and data based methodologies are required to detect, monitor, and comprehend the various defect mechanisms at sub-50nm technology nodes and their impact on product quality and in-field reliability. Defect and data-driven testing (D3T) has been in practice for a number of years and often used for yield learning and analysis. It is now gaining attention more than ever in production test. D3T uses data to reduce defect levels, increase reliability, and to diagnose and solve yield problems. D3T can provide the basis for Adaptive Test decisions on which test conditions, tests, or test subsets to add/remove. It can be utilized for improving the overall quality of test by the use of outlier analysis. However, how to implement and analyze test and defect data in making these decisions is not a widely understood or utilized process in the industry. Closing the gap on knowledge of the process, new test techniques, and how defect models are being used to adapt test flows will be the goals of this year’s D3T workshop.

Paper presentations on topics related to the topics listed below are expected to generate active discussion on the challenges that must be met to ensure high IC quality through the end of the decade.

Outlier Identification
Data-Driven Testing (DDT)
Test Data Analysis
Yield Learning and Analysis Using DDT
Adaptive Test
Data-Mining Methods for Test Data Processing
Low Voltage Testing
Elevated Voltage Testing and Stress Testing

Reliability and Yield
Nanometer Test Challenges
Defect Coverage & Metrics
Mixed Current/Voltage Testing
Economics of Defect Based Testing
Fault Localization & Diagnosis
Noise and Crosstalk Testing
Transition and Delay Fault Testing

Submissions

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To present at the workshop, submit a postscript or Acrobat (PDF) version of an extended abstract of at least 1000 words via e-mail to the Program Chair by September 3, 2010. Each submission should include full name and address of each author, affiliation, telephone number, fax and e-mail address. The presenter should also be identified. Camera-ready papers for inclusion in the digest of papers will be due on Sept. 26, 2010. Presentations on cutting edge test technology, innovative test ideas, and industrial practices and experience are welcome. Proposals for embedded tutorials, debates, panel discussions or “spot-light” presentations describing industrial experiences are also invited.

Technical Program Submissions:
Sankaran Menon
Intel
E-mail: Sankaran.Menon@intel.com

Key Dates

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Submission deadline: September 3, 2010
Notification of acceptance: September 16, 2010
Final copy deadline: September 26, 2010

Committees

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Organizing Committee

General Chair
Al Crouch, Asset-Intertech

Program Chair
Sankaran M. Menon, Intel

Co-Program Chair
Jeff Roehr, Mediatek

Vice Program Chair
Nisar Ahmed, TI

Finance Chair
Sankaran M. Menon, Intel

Publicity Chair
Arani Sinha, AMD

Publication Chair
Chintan Patel, UMBC

Steering Committee

Sankaran Menon, Intel
Adit Singh, Auburn Univ.
M. Tehranipoor, U Connecticut
Hank Walker, Texas A&M
Hans Manhaeve, Q-Start Test
Jim Plusquellic, U. New Mexico

Program Committee

Rob Aitken, ARM
Tom Bartenstein, Cadence
Nemat Bidokhti, Cisco
Ken Butler, TI
Krish Chakrabarty, Duke Univ.
Sreejit Chakravarty, LSI Logic
John Carulli, TI
Bruce Cory, Nvidia
Jennifer Dworak, Brown University
Patrick Girard, LIRRM
Sandeep Goel, TSMC
Rohit Kapur, Synopsys
Ajay Koche, Consultant
Mike Laisne, Qualcomm
Nilanjan Mukherjee, Mentor Graphics
Teresa McLaurin, ARM
Amit Nahar, TI
Suriyaprakash Natarajan, Intel
Jay Orbon, Verigy
John Potter, Asset-Intertech
Rajesh Raina, Freescale
Mani Soma, U Washington
Claude Thibeault, Ecole Tech
Li C. Wang, UCSB
Xiaoqing Wen, Kyushu Institute of Tech.
LeRoy Winemberg, Freescale
Qiang Xu, CUHK
Mahmut Yilmaz, AMD

For more information, visit us on the web at: http://d3t.tttc-events.org/

The IEEE Defect and Data-Driven Testing (D3T 2010) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).